1. Field of the Invention
The present invention relates to a Schottky gate field effect transistor that operates in the microwave region used for mobile communication, satellite communication, satellite broadcasting and the like.
2. Description of the Prior Art
In comparison with Si, compound semiconductors are known to have high electron mobilities. For example, the electron velocity of GaAs is approximately 6 times in the low electric field and 2.about.3 times in the high electric field as fast as that of Si. Such characteristics of high-speed electrons have been put to good use in developing applications thereof to high-speed digital circuit elements or high-frequency analog-circuit elements.
In a field effect transistor (referred to as `FET` in appropriate place, hereinafter) using a compound semiconductor, however, a gate electrode makes a Schottky junction with a channel layer of a substrate so that the electric field centers on a lower end (a circled field-centered section 30 in FIG. 12) of the gate electrode on the drain side, which may cause breakdown. This is a matter of great concern especially for a high-output FET that necessitates large signal operations.
Accordingly, numerous attempts have been hitherto made to prevent this field centralization on the edge section of the gate electrode on the drain side and improve withstanding voltage characteristics. As one example, there is known a technique to utilize a recess structure or an offset structure.
Further, another technique which raises the withstanding voltage is described in Japanese Patent Application Laid-open No. 232827/1997. This technique relates to an FET composing a switching circuit, wherein, as shown in FIG. 11, a cover electrode 20 is formed to cover a gate electrode and the electric potential of this cover electrode 20 is controlled to achieve improvement in characteristics of withstanding voltage.
Nevertheless, conventional techniques described above have the following problems, respectively.
In case of the FET having a recess structure or an offset structure, although a certain degree of improvement in characteristics of withstanding voltage can be attained, it is difficult to reach the standard currently required for characteristics of withstanding voltage with such means alone.
Further, the FET disclosed in Japanese Patent Application Laid-open No. 232827/1997 is originally designed for the purpose of use in switching circuits as mentioned in Claims therein. Therefore, differing from the FET for the use of amplifier circuits or oscillation circuits, this FET does not have a structure appropriate to obtain good high-frequency characteristics. This point is further described below.
In the FET disclosed in the above publication, a cover electrode spreads from a section above a gate electrode to a section above a drain electrode, as shown in FIG. 11. This generates a large parasitic capacitance between a channel layer and the cover electrode, which, in turn, lowers the operating speed and worsens high-frequency characteristics.
Further, because the gate electrode 5 and the cover electrode 20 overlapping each other, as seen in FIG. 11, are kept at the same electric potential, another parasitic capacitance 21 is generated between the cover electrode and the drain electrode, contributing to further impairment of high-frequency characteristics. This point is further described below.
The current gain cutoff frequency f.sub.T for an FET of this type is given by Equation (1), EQU f.sub.T =g.sub.m /2p(C.sub.g +C.sub.p) (1)
where g.sub.m is the mutual conductance, C.sub.g is the gate electrode capacitance and C.sub.p is the parasitic capacitance under the cover electrode (the field control electrode). In the prior art disclosed in the above publication, the value of the parasitic capacitance 21 is large so that the current gain cutoff frequency f.sub.T becomes small. Further, f.sub.T herein is proportional to the maximum frequency of oscillation f.sub.max (Equation (2)). EQU f.sub.max.varies. f.sub.T (2)
Therefore, as C.sub.p increases, the value of the maximum frequency of oscillation f.sub.max decreases and consequently applicable frequencies become limited to a lower range.
The conventional techniques, thus, have difficulty in preventing the field centralization and raising withstanding voltage while maintaining good high-frequency characteristics.
Accordingly, an object of the present invention is to provide a field effect transistor having both high withstand voltage characteristics and excellent high-frequency characteristics.